The invention relates to processing of analog signals. In particular, the invention relates to the conversion of analog signals into a digital format facilitated by the use of timestamps that denote characteristic signal events.
Analog signals are commonly used in a wide variety of devices and systems. Many systems employ analog signals to transfer information from one portion of the system to another. A common example of a system or device that uses analog signals is a sensor. In many practical situations encountered in the real world, it is often necessary or at least desirable to transform analog signals into a digital representation. This is especially true in cases where digital methodologies are used largely to process and analyze the analog signals.
For example, most manufacturers of integrated circuits (ICs) employ some form of automated test equipment (ATE) to test the IC products being manufactured. While ATEs are overwhelmingly implemented based on digital technologies, many of the modem ICs that are being manufactured, produce some analog output signals. This is becoming particularly true as modem system-on-a-chip devices are transitioned from the concept to the product phase. The problem for the designers and users of ATEs is how to transform analog signals into a format that can be utilized by the digital ATE.
The conventional approach to transforming an analog signal into a digital representation is to use an analog to digital converter (ADC). Conventional ADCs sample the amplitude of the analog signal or waveform at successive, often regularly spaced, points in time. The sampled amplitude values are converted to a digital format (i.e., digitized) by one of several approaches. Once digitized, the analog signal is represented by a time-sequence of digital values representing the amplitudes sampled by the ADC. Among the commonly employed ADC approaches known in the art are the over-sampling converters, such as the delta-sigma modulator-based ADCs, the successive approximation ADCs, and the so-called flash ADCs. Each of these technologies ultimately produces a string of digital words, each word representing a sampled amplitude value in digital form, in a time sequence at regularly spaced time intervals.
While conventional time-sampled analog to digital conversion can provide high fidelity conversion of analog signals to a digital form, the conventional ADCs can be costly to implement in some instances. In particular, many of the conventional ADC technologies are not well suited for simple, accurate on-chip implementations. This is especially true when considering on-chip conversion of analog signals for built-in-self-test (BIST) purposes or for use in conjunction with an external digital ATE. Similarly, the use of conventional ADC approaches as an interface between an analog device and an ATE can pose many problems, not the least of which is the need for extra dedicated resources in the ATE to accommodate the often high data rate digital signals generated by a conventional time-sampling ADC.
An interesting alternative to the use of conventional ADCs in the testing of devices is the use of so-called Oscillation BIST with frequency measurement. Oscillation BIST methodologies incorporate circuitry into an analog device or circuit such as an amplifier that can be used during test to temporarily xe2x80x98changexe2x80x99 circuitry causing the device to oscillate. Since the oscillation frequency and amplitude characteristics of the circuit under test are directly related to the performance of the circuitry, a determination can often be made based on the oscillations as to whether the device meets its operational requirements. Furthermore, since most ATEs can measure frequency fairly accurately, it is often possible to use a conventional ATE to make the determination. Unfortunately oscillation BIST is applicable to only a fraction of the analog circuits being employed in the modern analog and mixed signal devices, because only one or two values, frequency and an optional voltage of the oscillation, are extracted to judge whether the device under test is operational and meeting specifications. In addition, oscillation BIST can take an unacceptably long time, especially when dealing with circuits with low frequencies and/or long settling times in terms oscillation transients.
Accordingly, it would be advantageous to have a method and apparatus for transforming an analog signal into a digital representation that preserved key characteristics of the analog signal, while minimizing the implementation costs. In addition it would be beneficial if such a method and apparatus could be applied to any analog signal and could be implemented efficiently either on-chip or off-chip. Such a method and apparatus would solve a long-standing need in the area of analog to digital signal conversion, especially as the conversion relates to processing and testing of analog signals by digital systems such as ATEs.
The present invention is a novel method and apparatus for converting analog signals into a digital representation. The digital representation of the analog signal produced by the method and apparatus of the present invention is based on a time sequence and not on a conventional amplitude sequence. Conventional ADCs produce a sequence of digitized amplitude samples at predetermined times or equivalently at a set of predetermined time events. Unlike conventional ADCs, the method and apparatus of the present invention produces a sequence of digitized time samples at or corresponding to the occurrence of a set of predetermined amplitude events within the analog signal. The present invention essentially maps the analog signal to a series of events and records the time of occurrence of these events. The time record of the occurrence of the events can be thought of as a sequence of timestamps. The timestamp sequence generated for an analog signal by the method and apparatus of the present invention combined with knowledge of the events associated with the timestamp sequence can provide enough information to allow the reconstruction of the signal from the timestamps.
In one aspect of the present invention, a method of converting an analog signal into a quantity N of digital signal representations is provided. In particular, the analog signal may be from a device under test that produces an analog signal at an output or may be a signal internal to the device under test. The method comprises the step of comparing an amplitude of the analog signal to a quantity N of reference amplitudes to determine whether the analog amplitude is greater than or less than each reference amplitude. The quantity N is an integer equal to or greater than 1. The method further comprises the step of producing a first logic level in a digital signal corresponding to when the analog amplitude is greater than a respective reference amplitude. The step of producing further includes producing a second logic level in the corresponding digital signal when the analog amplitude is less than the respective reference amplitude. The steps of producing and comparing are performed until the digital signal comprises representations for a plurality of analog signal amplitude events.
The step of comparing comprises either simultaneously comparing the analog amplitude in the analog signal to the quantity N of reference amplitudes in parallel or sequentially comparing the analog amplitude in the analog signal to each one of the quantity N of reference amplitudes until all of the reference amplitudes have been compared.
In another aspect of the invention, a method of converting an analog signal from a device under test into a digital signal representation is provided. The method comprises the step of comparing an amplitude of the analog signal to a reference amplitude to determine whether the amplitude in the analog signal is greater than or less than the reference amplitude. The method further comprises the step of producing a first logic level in a digital signal when the amplitude is greater than the reference amplitude and a second logic level in the digital signal when the amplitude event is less than the reference amplitude. The method still further comprises the step of repeating the steps of comparing and producing for a period of time to obtain the digital signal representation of a plurality of amplitude events in the analog signal. According to the invention, an amplitude event is a length of time or a time that the amplitude of the analog signal is either greater than or less than the reference amplitude.
In still another aspect of the invention, an apparatus for converting an analog signal into a quantity N of digital signal representations is provided. In particular, the analog signal may be from a device under test that produces an analog signal at an output. The apparatus comprises an apparatus input, a quantity N of comparators and a quantity N of apparatus outputs, where N is an integer equal to or greater than 1. Each comparator has a first input, a second input and an output. The first input of each comparator is connected to the apparatus input and receives an analog amplitude value, wherein the amplitude value varies as a function of time. The second input of each comparator receives a different one of a quantity N of amplitude reference values. Each comparator produces a digital signal at the comparator output. The output of each comparator is connected to a different one of the N apparatus outputs. The apparatus can be implemented as a stand-alone unit or it can be incorporated into a device as part of onboard built-in test circuitry.
In still yet another aspect of the present invention, a system for converting an analog signal into a digital representation is provided. The system comprises an analog to digital conversion apparatus of the present invention. The apparatus has an input that receives and analog signal and a quantity N of apparatus outputs, where N is an integer equal to or greater than 1. The analog signal may be an output signal of a device under test or may be a signal internal to the device under test. The apparatus produces one of a quantity N of digital signals at each apparatus output. The system further comprises a quantity N of transition interval analyzers (TIAs). Each TIA has an input and an output, such that each apparatus output is connected to the input of one TIA. Each TIA encodes timing of logic transitions in a respective digital signal. Optionally, the system further comprises a test system for testing a device under test having a plurality of ports. Each port of the test system is connected to the output of one TIA. The test system uses the encoded timing information in the digital signal from the TIAs as timestamps of events in the analog signal to determine if device under test meets specifications.